:py:mod:`lager_pcb.rigol_mso5000_defines` ========================================= .. py:module:: lager_pcb.rigol_mso5000_defines Module Contents --------------- Classes ~~~~~~~ .. autoapisummary:: lager_pcb.rigol_mso5000_defines.CursorMode lager_pcb.rigol_mso5000_defines.CursorType lager_pcb.rigol_mso5000_defines.CursorSource lager_pcb.rigol_mso5000_defines.CursorUnit lager_pcb.rigol_mso5000_defines.ScopeChannel lager_pcb.rigol_mso5000_defines.TriggerType lager_pcb.rigol_mso5000_defines.TriggerCoupling lager_pcb.rigol_mso5000_defines.TriggerStatus lager_pcb.rigol_mso5000_defines.TriggerMode lager_pcb.rigol_mso5000_defines.TriggerEdgeSource lager_pcb.rigol_mso5000_defines.TriggerEdgeSlope lager_pcb.rigol_mso5000_defines.TriggerSlopeSource lager_pcb.rigol_mso5000_defines.TriggerSlopeCondition lager_pcb.rigol_mso5000_defines.TriggerSlopeWindow lager_pcb.rigol_mso5000_defines.TriggerPulseSource lager_pcb.rigol_mso5000_defines.TriggerPulseCondition lager_pcb.rigol_mso5000_defines.MeasurementSource lager_pcb.rigol_mso5000_defines.MeasurementClear lager_pcb.rigol_mso5000_defines.MeasurementItem lager_pcb.rigol_mso5000_defines.WaveformFormat lager_pcb.rigol_mso5000_defines.MathOperator lager_pcb.rigol_mso5000_defines.MathSource lager_pcb.rigol_mso5000_defines.MathLogicSource lager_pcb.rigol_mso5000_defines.LogicChannel lager_pcb.rigol_mso5000_defines.LogicGroup lager_pcb.rigol_mso5000_defines.LogicDisplaySize lager_pcb.rigol_mso5000_defines.LogicPod lager_pcb.rigol_mso5000_defines.BusMode lager_pcb.rigol_mso5000_defines.BusFormat lager_pcb.rigol_mso5000_defines.BusView lager_pcb.rigol_mso5000_defines.BusType lager_pcb.rigol_mso5000_defines.BusLogicSource lager_pcb.rigol_mso5000_defines.BusEndianness lager_pcb.rigol_mso5000_defines.BusUARTPolarity lager_pcb.rigol_mso5000_defines.BusUARTParity lager_pcb.rigol_mso5000_defines.BusUartPacketEnd lager_pcb.rigol_mso5000_defines.BusI2CAddressMode lager_pcb.rigol_mso5000_defines.BusSPISCLSlope lager_pcb.rigol_mso5000_defines.BusSPIPolarity lager_pcb.rigol_mso5000_defines.BusSPIMode lager_pcb.rigol_mso5000_defines.BusCANSigType lager_pcb.rigol_mso5000_defines.BusFlexRaySigType Attributes ~~~~~~~~~~ .. autoapisummary:: lager_pcb.rigol_mso5000_defines.MATHSOURCE_TO_CHANNEL .. py:class:: CursorMode Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Off :annotation: = OFF .. py:attribute:: Manual :annotation: = MANual .. py:attribute:: Track :annotation: = TRACk .. py:attribute:: XY :annotation: = XY .. py:attribute:: Measure :annotation: = MEASure .. py:class:: CursorType Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Time :annotation: = TIME .. py:attribute:: Amplitude :annotation: = AMPLitude .. py:class:: CursorSource Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Channel1 :annotation: = CHANnel1 .. py:attribute:: Channel2 :annotation: = CHANnel2 .. py:attribute:: Channel3 :annotation: = CHANnel3 .. py:attribute:: Channel4 :annotation: = CHANnel4 .. py:attribute:: Math1 :annotation: = MATH1 .. py:attribute:: Math2 :annotation: = MATH2 .. py:attribute:: Math3 :annotation: = MATH3 .. py:attribute:: Math4 :annotation: = MATH4 .. py:attribute:: Logic :annotation: = LA .. py:attribute:: NoSource :annotation: = NONE .. py:class:: CursorUnit Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Second :annotation: = SECond .. py:attribute:: Hertz :annotation: = HZ .. py:attribute:: Degree :annotation: = DEGRee .. py:attribute:: Percent :annotation: = PERCent .. py:class:: ScopeChannel Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Channel1 :annotation: = 1 .. py:attribute:: Channel2 :annotation: = 2 .. py:attribute:: Channel3 :annotation: = 3 .. py:attribute:: Channel4 :annotation: = 4 .. py:class:: TriggerType Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Edge :annotation: = EDGE .. py:attribute:: Pulse :annotation: = PUL .. py:attribute:: Slope :annotation: = SLOP .. py:attribute:: Video :annotation: = VID .. py:attribute:: Pattern :annotation: = PATT .. py:attribute:: Duration :annotation: = DUR .. py:attribute:: Timeout :annotation: = TIM .. py:attribute:: Runt :annotation: = RUNT .. py:attribute:: Window :annotation: = WIND .. py:attribute:: Delay :annotation: = DEL .. py:attribute:: Setup :annotation: = SET .. py:attribute:: NEdge :annotation: = NEDG .. py:attribute:: RS232 :annotation: = RS232 .. py:attribute:: IIC :annotation: = IIC .. py:attribute:: SPI :annotation: = SPI .. py:attribute:: CAN :annotation: = CAN .. py:attribute:: Flexray :annotation: = FLEX .. py:attribute:: LIN :annotation: = LIN .. py:attribute:: IIS :annotation: = IIS .. py:attribute:: M1553 :annotation: = M1553 .. py:class:: TriggerCoupling Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: AC :annotation: = AC .. py:attribute:: DC :annotation: = DC .. py:attribute:: LF_Reject :annotation: = LFR .. py:attribute:: HF_Reject :annotation: = HFR .. py:class:: TriggerStatus Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: TD :annotation: = TD .. py:attribute:: WAIT :annotation: = WAIT .. py:attribute:: RUN :annotation: = RUN .. py:attribute:: AUTO :annotation: = AUTO .. py:attribute:: STOP :annotation: = STOP .. py:class:: TriggerMode Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Auto :annotation: = AUTO .. py:attribute:: Normal :annotation: = NORM .. py:attribute:: Single :annotation: = SING .. py:class:: TriggerEdgeSource Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: D0 :annotation: = D0 .. py:attribute:: D1 :annotation: = D1 .. py:attribute:: D2 :annotation: = D2 .. py:attribute:: D3 :annotation: = D3 .. py:attribute:: D4 :annotation: = D4 .. py:attribute:: D5 :annotation: = D5 .. py:attribute:: D6 :annotation: = D6 .. py:attribute:: D7 :annotation: = D7 .. py:attribute:: D8 :annotation: = D8 .. py:attribute:: D9 :annotation: = D9 .. py:attribute:: D10 :annotation: = D10 .. py:attribute:: D11 :annotation: = D11 .. py:attribute:: D12 :annotation: = D12 .. py:attribute:: D13 :annotation: = D13 .. py:attribute:: D14 :annotation: = D14 .. py:attribute:: D15 :annotation: = D15 .. py:attribute:: Channel1 :annotation: = CHAN1 .. py:attribute:: Channel2 :annotation: = CHAN2 .. py:attribute:: Channel3 :annotation: = CHAN3 .. py:attribute:: Channel4 :annotation: = CHAN4 .. py:attribute:: AC_Line :annotation: = ACL .. py:class:: TriggerEdgeSlope Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Positive :annotation: = POS .. py:attribute:: Negative :annotation: = NEG .. py:attribute:: Either :annotation: = RFAL .. py:class:: TriggerSlopeSource Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Channel1 :annotation: = CHAN1 .. py:attribute:: Channel2 :annotation: = CHAN2 .. py:attribute:: Channel3 :annotation: = CHAN3 .. py:attribute:: Channel4 :annotation: = CHAN4 .. py:class:: TriggerSlopeCondition Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Greater :annotation: = GRE .. py:attribute:: Less :annotation: = LESS .. py:attribute:: GLess :annotation: = GLES .. py:class:: TriggerSlopeWindow Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: TA :annotation: = TA .. py:attribute:: TB :annotation: = TB .. py:attribute:: TAB :annotation: = TAB .. py:class:: TriggerPulseSource Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: D0 :annotation: = D0 .. py:attribute:: D1 :annotation: = D1 .. py:attribute:: D2 :annotation: = D2 .. py:attribute:: D3 :annotation: = D3 .. py:attribute:: D4 :annotation: = D4 .. py:attribute:: D5 :annotation: = D5 .. py:attribute:: D6 :annotation: = D6 .. py:attribute:: D7 :annotation: = D7 .. py:attribute:: D8 :annotation: = D8 .. py:attribute:: D9 :annotation: = D9 .. py:attribute:: D10 :annotation: = D10 .. py:attribute:: D11 :annotation: = D11 .. py:attribute:: D12 :annotation: = D12 .. py:attribute:: D13 :annotation: = D13 .. py:attribute:: D14 :annotation: = D14 .. py:attribute:: D15 :annotation: = D15 .. py:attribute:: Channel1 :annotation: = CHAN1 .. py:attribute:: Channel2 :annotation: = CHAN2 .. py:attribute:: Channel3 :annotation: = CHAN3 .. py:attribute:: Channel4 :annotation: = CHAN4 .. py:class:: TriggerPulseCondition Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Greater :annotation: = GRE .. py:attribute:: Less :annotation: = LESS .. py:attribute:: GLess :annotation: = GLES .. py:class:: MeasurementSource Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: D0 :annotation: = D0 .. py:attribute:: D1 :annotation: = D1 .. py:attribute:: D2 :annotation: = D2 .. py:attribute:: D3 :annotation: = D3 .. py:attribute:: D4 :annotation: = D4 .. py:attribute:: D5 :annotation: = D5 .. py:attribute:: D6 :annotation: = D6 .. py:attribute:: D7 :annotation: = D7 .. py:attribute:: D8 :annotation: = D8 .. py:attribute:: D9 :annotation: = D9 .. py:attribute:: D10 :annotation: = D10 .. py:attribute:: D11 :annotation: = D11 .. py:attribute:: D12 :annotation: = D12 .. py:attribute:: D13 :annotation: = D13 .. py:attribute:: D14 :annotation: = D14 .. py:attribute:: D15 :annotation: = D15 .. py:attribute:: Channel1 :annotation: = CHAN1 .. py:attribute:: Channel2 :annotation: = CHAN2 .. py:attribute:: Channel3 :annotation: = CHAN3 .. py:attribute:: Channel4 :annotation: = CHAN4 .. py:attribute:: Math1 :annotation: = MATH1 .. py:attribute:: Math2 :annotation: = MATH2 .. py:attribute:: Math3 :annotation: = MATH3 .. py:attribute:: Math4 :annotation: = MATH4 .. py:class:: MeasurementClear Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Item1 :annotation: = ITEM1 .. py:attribute:: Item2 :annotation: = ITEM2 .. py:attribute:: Item3 :annotation: = ITEM3 .. py:attribute:: Item4 :annotation: = ITEM4 .. py:attribute:: Item5 :annotation: = ITEM5 .. py:attribute:: Item6 :annotation: = ITEM6 .. py:attribute:: Item7 :annotation: = ITEM7 .. py:attribute:: Item8 :annotation: = ITEM8 .. py:attribute:: Item9 :annotation: = ITEM9 .. py:attribute:: Item10 :annotation: = ITEM10 .. py:attribute:: All :annotation: = ALL .. py:class:: MeasurementItem Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: VMax :annotation: = VMAX .. py:attribute:: VMin :annotation: = VMIN .. py:attribute:: VPP :annotation: = VPP .. py:attribute:: VTop :annotation: = VTOP .. py:attribute:: VBase :annotation: = VBASe .. py:attribute:: VAmp :annotation: = VAMP .. py:attribute:: VAvg :annotation: = VAVG .. py:attribute:: VRMS :annotation: = VRMS .. py:attribute:: Overshoot :annotation: = OVERshoot .. py:attribute:: Preshoot :annotation: = PREShoot .. py:attribute:: MArea :annotation: = MARea .. py:attribute:: MPArea :annotation: = MPARea .. py:attribute:: Period :annotation: = PERiod .. py:attribute:: Frequency :annotation: = FREQuency .. py:attribute:: RTime :annotation: = RTIMe .. py:attribute:: FTime :annotation: = FTIMe .. py:attribute:: PWidth :annotation: = PWIDth .. py:attribute:: NWidth :annotation: = NWIDth .. py:attribute:: PDuty :annotation: = PDUTy .. py:attribute:: NDuty :annotation: = NDUTy .. py:attribute:: TVMax :annotation: = TVMAX .. py:attribute:: TVMin :annotation: = TVMIN .. py:attribute:: PSlewrate :annotation: = PSLewrate .. py:attribute:: NSlewrate :annotation: = NSLewrate .. py:attribute:: VUpper :annotation: = VUPPer .. py:attribute:: VMid :annotation: = VMID .. py:attribute:: VLower :annotation: = VLOWer .. py:attribute:: Variance :annotation: = VARiance .. py:attribute:: PVRMS :annotation: = PVRMs .. py:attribute:: PPulses :annotation: = PPULses .. py:attribute:: NPulses :annotation: = NPULses .. py:attribute:: PEdges :annotation: = PEDGes .. py:attribute:: NEdges :annotation: = NEDGes .. py:attribute:: RRDelay :annotation: = RRDelay .. py:attribute:: RFDelay :annotation: = RFDelay .. py:attribute:: FRDelay :annotation: = FRDelay .. py:attribute:: FFDelay :annotation: = FFDelay .. py:attribute:: RRPhase :annotation: = RRPHase .. py:attribute:: RFPhase :annotation: = RFPHase .. py:attribute:: FRPhase :annotation: = FRPHase .. py:attribute:: FFPhase :annotation: = FFPHase .. py:class:: WaveformFormat Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: CSV :annotation: = CSV .. py:attribute:: RAW :annotation: = RAW .. py:class:: MathOperator Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Add :annotation: = ADD .. py:attribute:: Subtract :annotation: = SUBTract .. py:attribute:: Multiply :annotation: = MULTiply .. py:attribute:: Divide :annotation: = DIVision .. py:attribute:: And :annotation: = AND .. py:attribute:: Or :annotation: = OR .. py:attribute:: Xor :annotation: = XOR .. py:attribute:: Not :annotation: = NOT .. py:attribute:: FFT :annotation: = FFT .. py:attribute:: Intg :annotation: = INTG .. py:attribute:: Diff :annotation: = DIFF .. py:attribute:: Sqrt :annotation: = SQRT .. py:attribute:: Log :annotation: = LOG .. py:attribute:: Ln :annotation: = LN .. py:attribute:: Exp :annotation: = EXP .. py:attribute:: Abs :annotation: = ABS .. py:attribute:: LowPass :annotation: = LPASs .. py:attribute:: HighPass :annotation: = HPASs .. py:attribute:: BandPass :annotation: = BPASs .. py:attribute:: BandStop :annotation: = BSTop .. py:attribute:: AXB :annotation: = AXB .. py:class:: MathSource Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Channel1 :annotation: = CHANnel1 .. py:attribute:: Channel2 :annotation: = CHANnel2 .. py:attribute:: Channel3 :annotation: = CHANnel3 .. py:attribute:: Channel4 :annotation: = CHANnel4 .. py:attribute:: Ref1 :annotation: = REF1 .. py:attribute:: Ref2 :annotation: = REF2 .. py:attribute:: Ref3 :annotation: = REF3 .. py:attribute:: Ref4 :annotation: = REF4 .. py:attribute:: Ref5 :annotation: = REF5 .. py:attribute:: Ref6 :annotation: = REF6 .. py:attribute:: Ref7 :annotation: = REF7 .. py:attribute:: Ref8 :annotation: = REF8 .. py:attribute:: Ref9 :annotation: = REF9 .. py:attribute:: Ref10 :annotation: = REF10 .. py:attribute:: Math1 :annotation: = MATH1 .. py:attribute:: Math2 :annotation: = MATH2 .. py:attribute:: Math3 :annotation: = MATH3 .. py:data:: MATHSOURCE_TO_CHANNEL .. py:class:: MathLogicSource Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: D0 :annotation: = D0 .. py:attribute:: D1 :annotation: = D1 .. py:attribute:: D2 :annotation: = D2 .. py:attribute:: D3 :annotation: = D3 .. py:attribute:: D4 :annotation: = D4 .. py:attribute:: D5 :annotation: = D5 .. py:attribute:: D6 :annotation: = D6 .. py:attribute:: D7 :annotation: = D7 .. py:attribute:: D8 :annotation: = D8 .. py:attribute:: D9 :annotation: = D9 .. py:attribute:: D10 :annotation: = D10 .. py:attribute:: D11 :annotation: = D11 .. py:attribute:: D12 :annotation: = D12 .. py:attribute:: D13 :annotation: = D13 .. py:attribute:: D14 :annotation: = D14 .. py:attribute:: D15 :annotation: = D15 .. py:attribute:: Channel1 :annotation: = CHAN1 .. py:attribute:: Channel2 :annotation: = CHAN2 .. py:attribute:: Channel3 :annotation: = CHAN3 .. py:attribute:: Channel4 :annotation: = CHAN4 .. py:class:: LogicChannel Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: D0 :annotation: = D0 .. py:attribute:: D1 :annotation: = D1 .. py:attribute:: D2 :annotation: = D2 .. py:attribute:: D3 :annotation: = D3 .. py:attribute:: D4 :annotation: = D4 .. py:attribute:: D5 :annotation: = D5 .. py:attribute:: D6 :annotation: = D6 .. py:attribute:: D7 :annotation: = D7 .. py:attribute:: D8 :annotation: = D8 .. py:attribute:: D9 :annotation: = D9 .. py:attribute:: D10 :annotation: = D10 .. py:attribute:: D11 :annotation: = D11 .. py:attribute:: D12 :annotation: = D12 .. py:attribute:: D13 :annotation: = D13 .. py:attribute:: D14 :annotation: = D14 .. py:attribute:: D15 :annotation: = D15 .. py:attribute:: NoChannel :annotation: = NONE .. py:class:: LogicGroup Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Group1 :annotation: = GROup1 .. py:attribute:: Group2 :annotation: = GROup2 .. py:attribute:: Group3 :annotation: = GROup3 .. py:attribute:: Group4 :annotation: = GROup4 .. py:class:: LogicDisplaySize Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Small :annotation: = ['SMALl', 'SMAL'] .. py:attribute:: Medium :annotation: = ['LARGe', 'LARG'] .. py:attribute:: Large :annotation: = ['MEDium', 'MED'] .. py:class:: LogicPod Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Pod1 :annotation: = POD1 .. py:attribute:: Pod2 :annotation: = POD2 .. py:class:: BusMode Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Parallel :annotation: = PARallel .. py:attribute:: RS232 :annotation: = RS232 .. py:attribute:: SPI :annotation: = SPI .. py:attribute:: I2C :annotation: = IIC .. py:attribute:: I2S :annotation: = IIS .. py:attribute:: LIN :annotation: = LIN .. py:attribute:: CAN :annotation: = CAN .. py:attribute:: FlexRay :annotation: = FLEXray .. py:attribute:: M1553 :annotation: = M1553 .. py:class:: BusFormat Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Hex :annotation: = HEX .. py:attribute:: ASCII :annotation: = ASCii .. py:attribute:: Decimal :annotation: = DEC .. py:attribute:: Binary :annotation: = BIN .. py:class:: BusView Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Packets :annotation: = PACKets .. py:attribute:: Details :annotation: = DETails .. py:attribute:: Payload :annotation: = PAYLoad .. py:class:: BusType Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: PAL :annotation: = PAL .. py:attribute:: TX :annotation: = TX .. py:attribute:: RX :annotation: = RX .. py:attribute:: SCL :annotation: = SCL .. py:attribute:: SDA :annotation: = SDA .. py:attribute:: CS :annotation: = CS .. py:attribute:: CLK :annotation: = CLK .. py:attribute:: MISO :annotation: = MISO .. py:attribute:: MOSI :annotation: = MOSI .. py:attribute:: LIN :annotation: = LIN .. py:attribute:: CAN :annotation: = CAN .. py:attribute:: CANSub1 :annotation: = CANSub1 .. py:attribute:: FLEX :annotation: = FLEX .. py:attribute:: OneFiveFiveThree :annotation: = 1553 .. py:class:: BusLogicSource Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: D0 :annotation: = D0 .. py:attribute:: D1 :annotation: = D1 .. py:attribute:: D2 :annotation: = D2 .. py:attribute:: D3 :annotation: = D3 .. py:attribute:: D4 :annotation: = D4 .. py:attribute:: D5 :annotation: = D5 .. py:attribute:: D6 :annotation: = D6 .. py:attribute:: D7 :annotation: = D7 .. py:attribute:: D8 :annotation: = D8 .. py:attribute:: D9 :annotation: = D9 .. py:attribute:: D10 :annotation: = D10 .. py:attribute:: D11 :annotation: = D11 .. py:attribute:: D12 :annotation: = D12 .. py:attribute:: D13 :annotation: = D13 .. py:attribute:: D14 :annotation: = D14 .. py:attribute:: D15 :annotation: = D15 .. py:attribute:: Channel1 :annotation: = CHAN1 .. py:attribute:: Channel2 :annotation: = CHAN2 .. py:attribute:: Channel3 :annotation: = CHAN3 .. py:attribute:: Channel4 :annotation: = CHAN4 .. py:attribute:: Off :annotation: = OFF .. py:class:: BusEndianness Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: MSB :annotation: = MSB .. py:attribute:: LSB :annotation: = LSB .. py:class:: BusUARTPolarity Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Positive :annotation: = POSitive .. py:attribute:: Negative :annotation: = NEGative .. py:class:: BusUARTParity Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: NoParity :annotation: = NONE .. py:attribute:: Even :annotation: = EVEN .. py:attribute:: Odd :annotation: = ODD .. py:class:: BusUartPacketEnd Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: NULL :annotation: = NULL .. py:attribute:: LF :annotation: = LF .. py:attribute:: CR :annotation: = CR .. py:attribute:: SP :annotation: = SP .. py:class:: BusI2CAddressMode Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Normal :annotation: = NORMal .. py:attribute:: RW :annotation: = RW .. py:class:: BusSPISCLSlope Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: Positive :annotation: = POSitive .. py:attribute:: Negative :annotation: = NEGative .. py:class:: BusSPIPolarity Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: High :annotation: = HIGH .. py:attribute:: Low :annotation: = LOW .. py:class:: BusSPIMode Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: CS :annotation: = CS .. py:attribute:: Timeout :annotation: = TIMeout .. py:class:: BusCANSigType Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: TX :annotation: = TX .. py:attribute:: RX :annotation: = RX .. py:attribute:: CANHigh :annotation: = CANH .. py:attribute:: CANLow :annotation: = CANL .. py:attribute:: Differential :annotation: = DIFFerential .. py:class:: BusFlexRaySigType Bases: :py:obj:`lager_pcb.visa_enum.VisaEnum` .. py:attribute:: BP :annotation: = BP .. py:attribute:: BM :annotation: = BM .. py:attribute:: RT :annotation: = RT